[llvm-dev] llvm intrinsics

[Anoop Kumar via llvm-dev]

Most of the instructions on the processor I am working on do not match with
SelectionDAG, even simple swap with implicit registers that Hardware knows.
What is the best way to handle this? Adding a new ISD op will still force
me to use SelectionDAG. I don't know how to add intrinsics, In
include/llvm/IR I can write IntrinsicXXX.td. I don't know what arguments
are. I am not sure where I can expand in Target in sequence of assembly
instructions and bypass SelectionDAG. There is not much description on llvm
web site. Is there a way to use builtin? where can I I expand it to
assembly, I want to avoid SelectionDAG.
Any advice will be appreciated.
Thanks,
Anoop
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210813/16f1cb11/attachment.html>