[llvm-dev] [x86][inline-asm] Generate call instruction in pic

[Zhang, Xiang1 via llvm-dev]

We encounter a inline bug in generating call, hard to fix.
I want to ask some questions here.

1st  Does the IR generate from FE is wrong ?
PLS refer t.ll line3, it use "*m" constrain for call operand "void (...)* @sincos".   I think the right IR should be   ("m" + "void (...)* @sincos") or ("*m" + "void (...)** @sincos_ptr")
related patch in FE https://reviews.llvm.org/D107523

2nd How we fix it in Back End ?
I find it is hard to fix in BE, because the current arch of inline_asm let us hard to match the variable to its instruction.
I create a unbeautiful patch at BE too https://reviews.llvm.org/D108024

The following code will generate one more time load for "sincos" with cmd "clang -fasm-blocks t.c -fpic -S -emit-llvm" + "llc t.ll"
t.c:
1 extern void sincos ();
2 void foo (){
3    __asm{
4    call  sincos
5    ret };
6 }

t.ll:
  1 define void @foo() #0 {
  2 entry:
  3   call void asm sideeffect inteldialect "call qword ptr ${0:P}\0A\09ret", "*m,~{dirflag},~{fpsr},~{flags}"(void (...)* @sincos) #2, !srcloc !5
4   ret void
5 }
t.s:
1         movq    sincos at GOTPCREL(%rip), %rax        // now the rax has been the function address  "sincos"
2 #APP
3       callq   *(%rax)                                                      //  the call should directly read the %rax, should not "load" it again, it should be "callq *%rax" or better code "call sincos at plt"
4        retq
5 #NO_APP


BR!
Thank you!
Xiang

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