[llvm-dev] A question about support RV32E in the riscv target

[Craig Topper via llvm-dev]

I would probably not do that. It creates a reverse relationship that can
create unexpected surprises, for example passing "-mattr=-reserved-x31"
would clear the RV32E feature.

I would handle it in RISCVRegisterInfo::getReservedRegs or maybe
RISCVSubtarget::isRegisterReservedByUser. I would use the latter if it is
important that the other callers of isRegisterReservedByUser care about
this. Though I think most of those generate an error which might not be
what you want.

~Craig


On Mon, Aug 9, 2021 at 5:43 AM Ben Shi via llvm-dev <llvm-dev at lists.llvm.org>
wrote:

> Hello,
>
> Though the ABI / call-convention for rv32e has not be defined clear by the
> riscv organization.
>
> But besides that, is it possible to partial support it by adding target
> feature FeatureReserveX16---FeatureReserveX31 to the FeatureRV32E ?
> Just like
> def FeatureStdExtD
>     : SubtargetFeature<"d", "HasStdExtD", "true",
>                        "'D' (Double-Precision Floating-Point)",
>                        [FeatureStdExtF]>;
>
> FeatureStdExtD implies FeatureStdExtF, we can make FeatureRV32E implies
> FeatureReserveX16---FeatureReserveX31 ?
>
> Is this a proper way to tell the register allocator do not use X16-X31 ?
>
> Ben
>
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