[llvm-dev] TableGen processing of target-specific intrinsics

[Nicolai Hähnle via llvm-dev]

Hi Paul,

the intrinsics of all backends together with the target-agnostic
intrinsics are all part of a single large enum, and there are some
subtle assumptions made e.g. about how the values in this enum are
sorted (in order to emit tables that are suitable for binary search).
So this is an area in which to tread carefully.

That said, I don't think there's any inherent reason why we
_shouldn't_ try to entangle this a bit.

I've been thinking for a while now that in a sense, the
target-specific intrinsics are like a dialect of LLVM IR. It would
make sense to treat them as such more explicitly.

Cheers,
Nicolai

On Tue, Sep 29, 2020 at 9:23 PM Paul C. Anagnostopoulos via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Each of the main TableGen files for the supported targets includes
>
> include "llvm/Target/Target.td"
>
> In turn, Target.td includes
>
> include "llvm/IR/Intrinsics.td"
>
> The final lines of Instrinsics.td are
>
> include "llvm/IR/IntrinsicsPowerPC.td"
> include "llvm/IR/IntrinsicsX86.td"
> include "llvm/IR/IntrinsicsARM.td"
> include "llvm/IR/IntrinsicsAArch64.td"
> include "llvm/IR/IntrinsicsXCore.td"
> include "llvm/IR/IntrinsicsHexagon.td"
> include "llvm/IR/IntrinsicsNVVM.td"
> include "llvm/IR/IntrinsicsMips.td"
> include "llvm/IR/IntrinsicsAMDGPU.td"
> include "llvm/IR/IntrinsicsBPF.td"
> include "llvm/IR/IntrinsicsSystemZ.td"
> include "llvm/IR/IntrinsicsWebAssembly.td"
> include "llvm/IR/IntrinsicsRISCV.td"
>
> Why does every target include the all the instrinsics for all the targets?
>
> For example, when I process the ARC TableGen file, the records include 1,187 intrinsics for the X86.
>
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