[llvm-dev] TableGen processing of target-specific intrinsics

[Paul C. Anagnostopoulos via llvm-dev]

Each of the main TableGen files for the supported targets includes

include "llvm/Target/Target.td"

In turn, Target.td includes

include "llvm/IR/Intrinsics.td"

The final lines of Instrinsics.td are

include "llvm/IR/IntrinsicsPowerPC.td"
include "llvm/IR/IntrinsicsX86.td"
include "llvm/IR/IntrinsicsARM.td"
include "llvm/IR/IntrinsicsAArch64.td"
include "llvm/IR/IntrinsicsXCore.td"
include "llvm/IR/IntrinsicsHexagon.td"
include "llvm/IR/IntrinsicsNVVM.td"
include "llvm/IR/IntrinsicsMips.td"
include "llvm/IR/IntrinsicsAMDGPU.td"
include "llvm/IR/IntrinsicsBPF.td"
include "llvm/IR/IntrinsicsSystemZ.td"
include "llvm/IR/IntrinsicsWebAssembly.td"
include "llvm/IR/IntrinsicsRISCV.td"

Why does every target include the all the instrinsics for all the targets?

For example, when I process the ARC TableGen file, the records include 1,187 intrinsics for the X86.