[llvm-dev] Optimal variant of regbankselect

Gabriel Hjort Åkerlund via llvm-dev llvm-dev at lists.llvm.org
Wed Oct 28 21:40:57 PDT 2020


Hi Dominik,

 

(Sorry for spamming; the first reply only went to you and not the list.)

 

Cool that you want to try it out! There will for sure be some bugs in it, so
please let me know if/when you find one and I’ll fix it. And if you could
make a testcase out of it, that would be superb (as there’s currently a
complete lack of tests).

 

Although I haven’t measured it, I expect the compilation time to take about
3x more compared to greedy as it makes three passes over the instructions.
However, the most amount of work is done in the first pass, which is
comparable to the pass made in greedy. So hopefully it’s less than 3x, but
this should really be measured over a set of functions to get an accurate
figure. Also, there will most likely be improvements to be had to decrease
compilation time.

 

Cheers,

Gabriel

 

From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Dominik
Montada via llvm-dev
Sent: den 28 oktober 2020 14:39
To: llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] Optimal variant of regbankselect

 

Hi Gabriel,

thank you so much for doing this! I'll try out the patch in our downstream
implementation right away. Do you know how big of an impact this has on
compile time compared to fast and greedy?

Cheers,

Dominik

Am 28.10.20 um 14:32 schrieb Gabriel Hjort Åkerlund via llvm-dev:

Hi all,

 

I have made an attempt of implementing an optimal variant of the register
bank selector (regbankselect). The code is available for review at
https://reviews.llvm.org/D90304
<https://protect2.fireeye.com/v1/url?k=1bd4b7f0-45642a68-1bd4f76b-861fcb972b
fc-40f905c996dc0e0e&q=1&e=2c298e05-1e99-4460-b1a6-8895b7e94086&u=https%3A%2F
%2Freviews.llvm.org%2FD90304> , and I would greatly appreciate if anyone
interested can provide their comments. I have run a few tests the
regbankselect-*.mir testcases for AAarch64 and it seems to work, but more
tests are surely needed to increase confidence in the implementation. I also
tried using AMDGPU, but that backend does not provide the full list of
InstructionMappings for a given MachineInstr, which is needed in order to
compute the optimal selection of register banks.

 

Cheers,

Gabriel Hjort Åkerlund 





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