[llvm-dev] Work on DAG Isel for TableGen and compiler

[Thomas Lively via llvm-dev]

Hi Paul,

I think this would be time well spent. At least in the WebAssembly backend,
the vast majority of our ISel work is still done with DAG ISel. I know this
is different from the performance work you have in mind, but one of my
biggest pain points working on LLVM so far has been the poor error messages
from the DAG ISel pattern type checker. If you could find time to improve
those error messages, I would be extremely grateful.

Thanks,

Thomas

On Wed, Nov 18, 2020 at 10:19 AM Paul C. Anagnostopoulos via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> I have been working on improvements to TableGen's DAG Isel matcher
> backend. This has led me to thinking about ways to speed up the
> compile-time interpreter of the instruction selection matcher table.
>
> Is this worth my time, given Fast Isel and the upcoming Global Isel
> selector?
>
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