[llvm-dev] Different regs on the same list!

[Craig Topper via llvm-dev]

All MachineOperand's that use or define a particular virtual/physical
register are kept in a linked list. There is a separate list for each
register. This assert is checking that the register being added is
consistent with other nodes in the list it is being added to. There's a map
that is referenced by getRegUseDefListHead to find the linked list for a
particular register. So it seems like in your case the list and/or map have
gotten out of sync somehow. I'm not sure what you're doing wrong to get
into this state. Most APIs know about the lists and keep them updated. For
example, MachineOperand::setReg removes the old register from its list
before changing it.

On Tue, Dec 15, 2020 at 10:59 AM Bagel via llvm-dev <llvm-dev at lists.llvm.org>
wrote:

> What causes this assertion in lib/Codegen/MachineRegisterInfo.cpp?  I am
> building a MachineInstruction with a register operand and get this for
> certain
> registers.  What is the "list" keeping track of?  Any idea what I'm doing
> wrong?
>
> Thanks,
> brian
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