[llvm-dev] Overlapping register groups in old 8-bit MC6809 processor.

[Tim Northover via llvm-dev]

Hi Mark,

On Mon, 25 Mar 2019 at 14:49, Mark R V Murray via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> TableGen doesn't like that last line, the ALLREG group. I need it because the EXG and TFR instructions both take 2 register indices from either GR16 or GR8 (I'm happy to check that both are from the same group in C++ code if necessary, but right now I'm stuck with either specifying two operands from GR16 or 2 from GR8.

Have you considered modelling it as two separate instructions, TFR8
and TFR16 for example? That seems like it'd fit into LLVM's ideas
about register classes a lot more neatly, and as an added bonus it'd
automatically enforce the size constraint.

It's a reasonably common technique in LLVM, because what a datasheet
calls separate instructions is often pretty arbitrary.

> TableGen's objection is below. I can't make sense of the "too heavy" part.

It's referring to the "Weight" of a register class, which I'm a bit
fuzzy on but I think is related to how expensive copying would be. I
suspect it's going haywire because ALLREG attempts to unify a register
with its own subregisters (if AD is AA + AB it ought to be 2x as
heavy, but OTOH LLVM wants all registers in the same class to have a
consistent weight).

I don't have a solution though. I suspect ALLREG is fundamentally
unsound as far as LLVM is concerned and this is just the tip of the
iceberg.

Cheers.

Tim.