[llvm-dev] How to build an ARM Thumb2 ADD with shift immediate Machine Instruction
Jie Zhou via llvm-dev
llvm-dev at lists.llvm.org
Wed Mar 20 17:53:23 PDT 2019
Hello,
I’m trying to build an "ADD with shift immediate" machine instruction (ADD(register) Encoding T3; item A7.7.4 of the ARMv7-M manual) in an ARM machine function pass. Here is my code
BuildMI(...., TII->get(ARM::t2ADDrs), r1).addReg(r1).addReg(r1).addReg(r2).addImm(imm);
This code can compile, but I got a failed assertion
Assertion `idx < size()' failed.
thrown by llvm/include/llvm/ADT/SmallVector.h. when I compile test program with the pass.
I tried to tweak the registers and immediates added to the BuildMI() but haven't succeeded.
Can anyone give me some direction on how to tackle this problem?
Also, can anyone explain to me what
pred:14
and
pred:%noreg
mean in ARM machine instructions? I see them everywhere.
Thanks,
-Jie
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