[llvm-dev] Can register class effect ISel pattern?

Nancy via llvm-dev llvm-dev at lists.llvm.org
Wed Jul 31 20:31:23 PDT 2019


Hi,
Can register class effect Instruction selection prefer in ISel pattern?

Example:
Same LLVM IR add instruction, same data type i32, different asm
instruction, different register class  GPR,  SGPR
if one operator comes from GPR register class, it selects GPR "add" instruction
if all operators come from SGPR register class, it select SGPR "add" instruction


-- 
Best Regards,
Yu Rong Tan


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