[llvm-dev] Intrinsics for RISCV CSR instructions

[David Jones via llvm-dev]

I would like to generate LLVM IR from my custom compiler that will lower to
a CSR access instruction.

Can I emit arbitrary inline asm from LLVM IR without using clang?


On Wed, Feb 13, 2019 at 4:45 PM Alex Bradbury <asb at lowrisc.org> wrote:

>
>
> On Wed, 13 Feb 2019, 21:17 David Jones via llvm-dev <
> llvm-dev at lists.llvm.org wrote:
>
>> I notice that no intrinsics have been defined for the CSRRW/CSRRS/CSRRC
>> instructions.
>>
>> It would be convenient to have intrinsics for these to allow CSR
>> manipulation directly from IR code.
>>
>> Interestingly, this seems to be true for PowerPC (no intrinsics for
>> mfdcr/mtdcr) and X86 (no in/out) as well.
>>
>> Are there plans to define standard RISCV intrinsics for this?
>>
>
> Its not something I'd considered but I'd be happy to review a proposal or
> patches if there's precedent in LLVM with other backends l a good use case
> justification. Why would intrinsics be preferred to just using inline asm?
>
> Best,
>
> Alex
>
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