[llvm-dev] Intrinsics for RISCV CSR instructions

Alex Bradbury via llvm-dev llvm-dev at lists.llvm.org
Wed Feb 13 13:45:35 PST 2019

On Wed, 13 Feb 2019, 21:17 David Jones via llvm-dev <llvm-dev at lists.llvm.org

> I notice that no intrinsics have been defined for the CSRRW/CSRRS/CSRRC
> instructions.
> It would be convenient to have intrinsics for these to allow CSR
> manipulation directly from IR code.
> Interestingly, this seems to be true for PowerPC (no intrinsics for
> mfdcr/mtdcr) and X86 (no in/out) as well.
> Are there plans to define standard RISCV intrinsics for this?

Its not something I'd considered but I'd be happy to review a proposal or
patches if there's precedent in LLVM with other backends l a good use case
justification. Why would intrinsics be preferred to just using inline asm?


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