[llvm-dev] [RFC] Vector Predication
Luke Kenneth Casson Leighton via llvm-dev
llvm-dev at lists.llvm.org
Fri Feb 1 16:39:22 PST 2019
On Friday, February 1, 2019, Simon Moll <moll at cs.uni-saarland.de> wrote:
> We could untie the mask length from the data length:
> %result = call <scalable 4 x float> @llvm.evl.fsub.v4f32(<scalable 4 x
> float> %x, <scalable 4 x float> %y, <scalable 1 x i1> %M, i32 %L)
> would then indicate the mask %M applies to groups of "4 / 1" float
That would provide the greatest flexibility, as a 1:1 ratio could mean 1
bit per element, covering the normal case.
Question: are there any circumstances under which it is desirable to
underspecify or overspecify the number of bits in the predicate?
ie to deliberately have a FP vector of length 11 and a mask of length 9 or
Or, is that just a runtime error.
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the llvm-dev