[llvm-dev] Disassembler decoding conflict
Oliver Stannard via llvm-dev
llvm-dev at lists.llvm.org
Mon Apr 1 19:32:57 PDT 2019
You can set the DecoderMethod field of both instructions to point to a C++
decode function (in <target>Disassembler.cpp), which can then do whatever
you need to do to disambiguate between the two
instructions. DecodeCPSInstruction in the ARM backend looks like a good
example of this.
Oliver
On Tue, 2 Apr 2019 at 06:48, Josh Sharp via llvm-dev <
llvm-dev at lists.llvm.org> wrote:
> I have an ADDI instruction and an ADDI_Clone instruction which is just a
> special case of ADDI. The 2 have the same opcode. During generation of
> XXXGenDisassemblerTables.inc, I get this message
>
> Decoding Conflict:
> 00000...........
> ................
> ADDI 00000___________
> ADDI_clone 00000___________
>
>
> What is the proper way to solve this conflict?
>
> Thanks.
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190402/c22308a0/attachment.html>
More information about the llvm-dev
mailing list