[llvm-dev] Question about MachineCSE optimization

mbraun via llvm-dev llvm-dev at lists.llvm.org
Sun Oct 21 14:48:05 PDT 2018


As far as I understand it (though I didn’t write the code so I may be missing something) this is about making sure liveness flags (kill, dead) are updated correctly when merging instruction. The situations to consider are probably:

1)
OP_X …, implicit-def %X
with
OP_X …, implicit-def dead %X

The merged instruction probably should not have a dead flag set. The 2nd if appears to be about this situation:


2)
OP_X …, implicit-def dead %X
Use killed %X
…
OP_X …, implicit-def %X    ; this gets merged with the previous OP_X
Use %X

Once we merge the 2nd OP_X with the first one, we have to drop the `killed` flags on the %X users.



Though admittedly I am at a loss right now why this is only performed for implicit operands and not for all operands…

- Matthias

> On Oct 20, 2018, at 1:38 AM, Yuchao (Michael) via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi 
>  
> I am trying to fix a bug in MachineCSE and have one question about following code:
>  
> *********************************************
> // Go through implicit defs of CSMI and MI, if a def is not dead at MI,
> // we should make sure it is not dead at CSMI.
> if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead())
>   ImplicitDefsToUpdate.push_back(i);
>  
> // Keep track of implicit defs of CSMI and MI, to clear possibly
> // made-redundant kill flags.
> if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
>   ImplicitDefs.push_back(OldReg);
>  
> if (OldReg == NewReg) {
>   --NumDefs;
>   continue;
> }
> **********************************************
>  
> From Above source code, it seems that CSE does not handle instruction which
> have one operand that is ‘implicit+isDead+isDef’.
>  
> Base on my understanding, implicit dead register is mean clobbered, so it is not safe to
> do CSE. Is this right?
>  
> Best wishes
> Michael
>  
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