[llvm-dev] Question about MachineCSE optimization

[Yuchao (Michael) via llvm-dev]

Hi

I am trying to fix a bug in MachineCSE and have one question about following code:

*********************************************
// Go through implicit defs of CSMI and MI, if a def is not dead at MI,
// we should make sure it is not dead at CSMI.
if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead())
  ImplicitDefsToUpdate.push_back(i);

// Keep track of implicit defs of CSMI and MI, to clear possibly
// made-redundant kill flags.
if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg)
  ImplicitDefs.push_back(OldReg);

if (OldReg == NewReg) {
  --NumDefs;
  continue;
}
**********************************************

>From Above source code, it seems that CSE does not handle instruction which
have one operand that is 'implicit+isDead+isDef'.

Base on my understanding, implicit dead register is mean clobbered, so it is not safe to
do CSE. Is this right?

Best wishes
Michael

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