[llvm-dev] Scheduling defs and uses close in PreRA

[Andrew Trick via llvm-dev]

Hi Alex,

Any of the heuristics that minimize register pressure would tend to shorten live ranges. Machine schedulers can certainly add their own heuristics on top of that.

-Andy

> On Oct 4, 2018, at 2:55 PM, Alexey Zhikhartsev <alexey.zhikhar at gmail.com> wrote:
> 
> Hi everyone,
> 
>  
> 
> Here, Florian Hahn talks about PreRA instruction scheduling: https://youtu.be/brpomKUynEA?t=582 <https://youtu.be/brpomKUynEA?t=582>
>  
> 
> Florian mentions that one of its main goals is to schedule defs and uses closer together to shorten live ranges and decrease the chance of spills. My question is: where is the code that specifically implements this logic of putting defs and their corresponding uses closer together? I was expecting to find relevant code in MachineScheduler.cpp GenericScheduler but couldn't. Any pointers would be appreciated.
> 
>  
> 
> Best,
> 
> Alex
> 
> 

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