[llvm-dev] Interprocedural register allocation. Status?

[Hal Finkel via llvm-dev]

Hi, Jon,

I believe that the status is that it works, although there are some
outstanding issues around conditionally-reserved registers on some
targets, please see
http://lists.llvm.org/pipermail/llvm-dev/2018-May/122884.html for some
discussion of the outstanding issues.

 -Hal

On 05/30/2018 02:31 PM, Jon Chesterfield via llvm-dev wrote:
> There was a GSoC project in 2016, final report
> at https://docs.google.com/document/d/1v-R7gB7Or4bPn0LW7d-yb1yla8jK3DVmTJNFVNYNu6k
>
>
> Google doesn't show a lot of activity since. Has anyone taken this
> work further / put it near production? I'm interested in removing
> register spills around functions that are known to not clobber said
> registers.
>
> Thanks!
>
> Jon
>
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

-- 
Hal Finkel
Lead, Compiler Technology and Programming Languages
Leadership Computing Facility
Argonne National Laboratory

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20180530/6032de15/attachment.html>