[llvm-dev] generating multiple instructions for a single pattern

[David Chisnall via llvm-dev]

On 2 Mar 2018, at 11:45, Nagaraju Mekala <nagaraju.mekala87 at gmail.com> wrote:
> 
> yes they are dependent if the branch immediate value is > 0xffff then
> the imm instruction should generate other wise only "br" instruction
> is enough.

This sounds as if you have two br instructions, one that takes an immediate and one that takes a register and requires that another instruction materialise the address in a register.  This is common to most targets - you will find lots of examples in the code - but the high-level picture is to describe both variants in TableGen with appropriate constraints on the range of the immediate.  SelectionDAG will pick the immediate version of the constraints match, otherwise it will pick the register version.

David