[llvm-dev] Target hardware loop instruction via intrinsics

Tim Northover via llvm-dev llvm-dev at lists.llvm.org
Thu Jun 21 12:10:31 PDT 2018

Hi Jon,

On Thu, 21 Jun 2018 at 19:08, Jon Chesterfield via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> I think this would require a pair of intrinsics to denote the start and end of the loop. Is there a reasonable way to model this in llvm?

Have you looked into how OpenMP vectorization pragmas are handled yet?
I only glanced at it out of curiosity the other week but it looks like
they attach some "!loop" metadata to the back-edge branch of the loop
involved. It looks string-based and so reasonably extensible, and
legality is already one of the bits of information encoded.

What I don't know is whether that's available to MIR if you end up
doing your work there. The main vectorizers act on IR.



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