[llvm-dev] Branch relaxation at assembler level (RISCV)

Paolo via llvm-dev llvm-dev at lists.llvm.org
Tue Dec 4 12:07:23 PST 2018

Hi all,

I'm trying to implement the same branch relaxation mechanism implemented
in CodeGen in the MC layer of RISCV.

  beqz t1, L1


  bnez t1, L2

  j L1

That's because LLVM does not apply the CodeGen optimizations when
compiling directly from assembly code.

What I'd like to do would be to add a pass that does that on the MC
instructions or at least to find a way to implement this relaxation in
the MC assembler.

Any suggestions on where/how to do it? Or any existing fixes?

Many thanks,

Paolo Savini

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