[llvm-dev] RFC: AArch64 SVE Assembler/Disassembler patches

[Florian Hahn via llvm-dev]

Hi,

Thanks for sharing the initial patches Sander and thanks Alex for taking 
a look already!

Also, Graham and myself will host a Hackers Lab table to discuss how to 
best add support for SVE to LLVM today from  4:40pm - 6:25pm.


On 19/10/2017 16:42, Sander De Smalen via llvm-dev wrote:
> Thanks Alex!
> 
> We thought it would be good to start sharing the more mechanical parts of our SVE work, separate from more involved topics like IR and Codegen. Hopefully the assembler/disassembler patches will give some visibility into the available instructions (other than just pointing to specification/documentation). Most of these assembler/disassembler patches are functionally quite simple, the only thing is that there is a quite a lot of them, so it may take some time before all are reviewed/merged.
> 
> Perhaps one of the things I'm hoping to get feedback is if these patches are of the right size and have the right level of description. For instance, I wasn't sure if splitting out e.g. patch 4 (out of 5) is any useful. But I’m open to any feedback people may have.


I think it would be good to give a description/explanation of the change 
in the review description.

> Other than that, I also wanted to inform about the series of patches that I’ll be putting on Phabricator the coming months with some pointers to the SVE spec (for reference).
> 


Cheers,
Florian