[llvm-dev] Request for comments on optimizing assembler

[Colin LeMahieu via llvm-dev]

Hi everyone, we've been prototyping an optimizing assembler for Hexagon for
the purpose of updating legacy assembly for new architectures, packet rules,
and instruction latencies.  It seems like others would be interested in
using this and we're looking for any related feedback: has it been attempted
before, who's interested, or any general suggestions. 

 

We're using the MachineFunctionInitializer created to support MIR in order
to process the MC and construct MachineFunctions.

 

Currently the workflow sketch is:

-        Use flags and code from llvm-mc to assemble a file in to an MC
representation.

-        Use a target-specific MachineFunctionInitializer to convert the MC
-> MI and write out the contents to a MachineFunction.  

-        Use flags and code from llc to run the MI through compiler passes
for reemission.

 

We'd need to either attach it to an existing tool or create a new one and
pick somewhere in the pass pipeline to start running passes. 

 

 

Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, 
a Linux Foundation Collaborative Project

 

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