[llvm-dev] About CodeGen quality

[Friedman, Eli via llvm-dev]

On 6/15/2017 1:37 PM, 陳韋任 wrote:
>
>>     Our target doesn't support load i64, so we have following code
>>     in XXXISelLowering.cpp
>>
>>       setOperationAction(ISD::LOAD, MVT::i64, Custom);
>>     Transform load i64 to load v2i32 during type legalization.
>
>     If misaligned load v2i32 isn't legal, don't generate it.  If it is
>     legal, you might need to mess with your implementation of
>     allowsMisalignedMemoryAccesses.
>
>
> ​Will check that. ​Just a little more explanation about the misaligned 
> part. We declare i64 is 8 align in the DataLayout, and in "%0 = load 
> i64, *i64 ptr, align 4" the alignment is 4. In the op legalization 
> stage, it will go through
>
>     SelectionDAGLegalize::LegalizeLoadOps -> 
> TargetLowering::expandUnalignedLoad
>
> We don't expect load i64 would be 4 align, so how do I know I will 
> generate misaligned load v2i32 beforehand? Another question is usually 
> what we do to handle load i64 if that is not natively supported? Is it 
> correct transforming load i64 to load v2i32? An existing backend 
> example would be great.

You can get the alignment by casting the SDNode to LoadSDNode, then 
calling getAlignment().

I think all in-tree backends which don't have 64-bit integer registers 
use the default expansion for an i64 load, which splits the load into 
two i32 loads.

-Eli

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project

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