[llvm-dev] [SPIR/PTX] Divergence analysis for BasicBlocks

Zaks, Ayal via llvm-dev llvm-dev at lists.llvm.org
Fri Jul 21 08:13:05 PDT 2017

What would be the definition of “isControlDivergent(BasicBlock*)”; the complementary of “allActive(BasicBlock*)” – blocks known to execute all lanes, whenever reached? Note the (distinct) term “rewire targets” that Ralf Karrenberg used in his thesis.

From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Alexandre Isoard via llvm-dev
Sent: Friday, July 14, 2017 20:53
To: llvm-dev <llvm-dev at lists.llvm.org>
Subject: [llvm-dev] [SPIR/PTX] Divergence analysis for BasicBlocks


It seems to me that our current DivergenceAnalysis does not save which BasicBlocks may suffer from divergent control. Am I correct?

I want to modify our DivergenceAnalysis to add a "bool isControlDivergent(BasicBlock*) const" method and save in the divergence propagator the basicblock that are divergent. I am not sure that is entirely correct, if you have input on that please let me know.

That being said, to ease my debugging process I want to introduce a -dot-divergence pass that dump the cfg with divergent basicblocks in red. I was wondering if our dot printer is flexible enough to allow me to also print in color the SSA variables that are divergent.


Alexandre Isoard
Intel Israel (74) Limited

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