[llvm-dev] Deprecating the experimental microMIPS64R6 backend
David Chisnall via llvm-dev
llvm-dev at lists.llvm.org
Thu Jul 13 03:21:34 PDT 2017
On 13 Jul 2017, at 11:14, Simon Dardis via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> Hi all,
> I plan to deprecate the experimental microMIPS64R6 backend for the 5.0 release
> and remove it after the release.
> Currently there are no CPUs that use that particular sub-ISA which makes it difficult
> to justify the maintenance and parallel development effort.
> If there was a CPU design produced that did use microMIPS64R6, the backend could
> be restored from the archive.
> Any comments or objections?
Are there any microMIPS or MIPS16 CPUs in the wild? There is a lot of complexity in the MIPS back end to handle these, but I’ve never seen one (and support for the far more common MIPS IV CPUs has suffered as a result of the back end focusing on these variants).
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