[llvm-dev] [GSoC 2016] Need more info on Add a MachineModulePass

[Quentin Colombet via llvm-dev]

Hi Vivek,

> On Mar 16, 2016, at 1:00 PM, vivek pandya via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hello,
> 
> Probably this may be too late to start thinking about this project but I think this is particularly useful feature for LLVM.

+1. I’d like to use something this feature in GlobalISel. The idea is that has as soon as we lowered the LLVM IR of the whole module to MachineInstr, the LLVM IR should be deallocable.
In other words, the MachineModule/MachineFunctions should contain enough information such that we do not have to keep the LLVM IR around.

One of the main challenge is about alias analysis information that are tight with LLVM IR, but may be used in MachineFunctionPass.

> A quick use I can think of this is Implementing Inter-procedural Register Allocation ( for Research purpose ).
> 
> I have start looking at the code for MachineFunctionPass, I think currently MachineModule class is not available ( the project work will include that ) but trying to find out required details to first create a MachineModule class which holds references to required information. I am also trying to figure out what are the things should compose MachineModule class ( some sort of analogy with Module class used for IR passes)

At least for GlobalISel, we would need a way to create and get the global variables of a Module, but lowered to MachineInstr (or MC) level.

> 
> After that I think next step is to extend the ModulePass and let ModulePass execute optimization provide enough information.

+1

> 
> Am I going in correct direction?

Yes, at least, it makes sense to me.

> Please provide some pointers.

Other than gathering feedback on what is needed and trying, I unfortunately cannot offer anything else.

Cheers,
-Quentin
> 
> Sincerely,
> Vivek Pandya
> 
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