[llvm-dev] GSoC, question on open projects

[Janek van Oirschot via llvm-dev]

Hello,

My name is Janek van Oirschot, currently student premaster embedded
systems at the Technical University of Eindhoven and interested in
participating in GSoC and contributing to LLVM. I have some experience
with development for the GNU Assembler in which I looked into
assembly-time relaxation.

I have looked at the open projects page, found some interesting
projects but still have some questions about them:

"Add support for 16-bit x86 assembly and real mode to the assembler
and disassembler, for use by BIOS code. This includes both 16-bit
instruction encodings as well as privileged instructions (lgdt, lldt,
ltr, lmsw, clts, invd, invlpg, wbinvd, hlt, rdmsr, wrmsr, rdpmc,
rdtsc) and the control and debug registers."

Correct me if I'm mistaken, but isn't this already implemented in llvm
mc? I haven't searched for every instruction part of these
architectures but I was able find to some of the privileged
instructions for x86's .td definitions; however, maybe I'm
misunderstanding the relation between llvm-mc and llvm-as and which
what this project refers to.

"Write LLVM IR level debugger (extend Interpreter?)"

I haven't found anything that implies this has been worked on. Is this
available? If so, what exactly is meant with this? Using a target's
LLVM bitcode to step through code? Using LLVM's IR to step though a
target's bitcode in the interpreter? Though, these questions might
sound silly as I'm not wel versed yet in the internals.

Kind regards,
Janek van Oirschot