[llvm-dev] Disabling Sparc (or other) back-end Floating Point registers

[James Y Knight via llvm-dev]

On Fri, Mar 11, 2016 at 7:20 AM, Chris.Dewhurst via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> I'm trying to estimate the work involved in disabling floating point
> registers on a Sparc back-end.
>
> Currently, I'm not sure how one would go about this. I can't identify
> equivalent examples in other processor back-ends.

Besides PPC which was already mentioned, you can look at the other
targets which have a useSoftFloat() function.

> Clearly, disabling FP registers is only the start. The bigger task is
> getting floating point operations to use the integer registers after that.

Actually I think that the bigger task mostly happens automatically
when you've disabled the FP registers. I think you may also need to
put an if around the calls to setOperationAction(..., MVT::f*, Custom)
in SparcISelLowering to avoid invoking the custom expansions which
depend on fp registers.

One possibly-tricky thing is ensuring that the function call ABI looks
as expected -- e.g. does it match what GCC will do with -msoft-float?
That may just work without doing anything, but I'm not sure.