[llvm-dev] TableGen operand question

[Simon Cook via llvm-dev]

Hi Dawid,

I've had to do something similar for a different backend, whereby I use
memory locations as a substitute for registers in something rather
register-contrained, and I hope this may be relevant to the issue you're
trying to solve.

How I would tackle this is to create a register class full of pseudo
registers where each one represents one memory location, and do
instruction selection and register allocation on that. Once that is
complete, I would have a pass which goes through each instruction in a
MachineFunction and replace the operands with the reference to memory
and emit that. In my case these pseudo registers lived on a stack, so
the replacement wasn't too difficult, I don't think replacing registers
with symbols would be any harder than that. Once complete it's just a
matter of having your assembler and linker handle these references
(though you should be able to generate some assembly directives to help
here also). Note may have to store some data in your targets
MachineFunctionInfo class to help keep track of the real size of a
frame, as asking a MachineFunction will now give the wrong result.

One consideration would be the size of this register class (that is, the
number of pseudo registers you create). If you make it too large and you
may end up wasting memory, though I'm not sure exactly what the register
allocations will do in this case if given far too many registers for a
given problem. If you make it too small, you'll have to start thinking
about how to spill memory locations to other memory locations (or
rewriting generated code post-regalloc to avoid this).

Hope this helps.

Thanks,
Simon

On 09/06/16 10:41, Dawid Retkiewicz via llvm-dev wrote:
> Hi,
> 
> As a way to learn LLVM, I'm trying to write a backend for the Microchip
> PIC18 8-bit microcontroller.
> On this device, the hardware stack is very small and is used only for
> storing function return addresses.
> A "real" software stack implementation is not very efficient because of
> the limited instruction set, so for all the non-reentrant functions I've
> decided to use a similar solution to the one used by Microchip's own XC8
> compiler, which is to simulate the stack by assigning constant memory
> locations to every function.
> Local variables/parameters could then be accessed by using constant
> memory addresses. Since this microcontroller can perform most
> instruction directly on such addresses, this seems the most efficient
> way to handle the stack.
> 
> The issue I'm facing right now is how to resolve the stack addresses in
> the LLVM backend.
> For instance, when calling a function, I'd like to store its parameters
> directly in the memory area assigned to this function.
> If I understand correctly, the exact stack size (and thus the memory
> needed by each function) cannot be determined before the
> epilogue/prologue insertion pass.This means that the target memory
> location is not known before this step.
> 
> My idea is to create an operand that would hold an identifier of the
> target function and the memory offset, and replace this identifier with
> a real memory address in a pass after emit prologue/epilogue.
> However, I'm not sure how to achieve such thing in TableGen, and whether
> it's at all possible.
> I would be grateful for any tips/directions 
> 
> Thanks,
> Dawid Retkiewicz
> 
> 
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