[llvm-dev] Strong compilation scheme of acquire loads to PPC

[Jeehoon Kang via llvm-dev]

Hi everyone,

I wonder if why acquire loads (atomic accesses) are compiled to PowerPC as
`load+lwsync`, which is stronger than what is known to be sound:
`load+ctrl+isync`.  The relevant code section is:
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/PowerPC/PPCISelLowering.cpp#L8374

Note that the compiler writers recognized this issue, and there is a
comment on it in the above code section.  But I would like to know if there
are more discussions on this issue.  Specifically, I would like to know if
the current compilation scheme is intentionally used.  Otherwise, I want to
make a patch that weakens the compilation scheme of acquire loads.

Thank you,
Jeehoon

-- 
Jeehoon Kang (Ph.D. student) <http://sf.snu.ac.kr/jeehoon.kang>
Software Foundations Laboratory <http://sf.snu.ac.kr>
Seoul National University <http://www.snu.ac.kr>
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