[llvm-dev] Bug in X86 assembler?

Tamazov, Artem via llvm-dev llvm-dev at lists.llvm.org
Thu Feb 18 04:27:59 PST 2016


You can't use mov.
I am not an x86 expert, but after quick googling:
Recall  that  immediates  are  normally  restricted  to  32  bits.   To  load  a  larger  constant  into  a  quad  register,  use
movabsq, which takes a full 64-bit immediate as its source
[https://www.lri.fr/~filliatr/ens/compil/x86-64.pdf]
Even in your example, assembler replaces mov by movq, which, say, hints:
>>>>> $ echo "mov r8, 0x12345678"|./bin/llvm-mc -assemble -show-encoding -x86-asm-syntax=intel -print-imm-hex -triple=x86_64
>>>>>     .text
>>>>>     movq    $0x12345678, %r8        # encoding: [0x49,0xc7,0xc0,0x78,0x56,0x34,0x12]

I would recommend you some studying of x86 instruction set.
Another recommendation is to look at existing tests when you suspect a bug.

Regards,
--artem.

From: Jun Koi [mailto:junkoi2004 at gmail.com]
Sent: 18 February, 2016 15:09
To: Tamazov, Artem
Subject: RE: [llvm-dev] Bug in X86 assembler?


On Feb 18, 2016 7:27 PM, "Tamazov, Artem" <Artem.Tamazov at amd.com<mailto:Artem.Tamazov at amd.com>> wrote:
>
>         movabsq %rax,0xabcdef1234567890

Cool, but i want to use mov to copy immediate to 64 reg, and for some reasons Llvm cannot do that. I want to confirm this is a bug, but not to find workaround.

Thanks.

>
> See https://www.cs.cmu.edu/~fp/courses/15213-s07/misc/asm64-handout.pdf
>
> --artem//
>
>
>
> From: Jun Koi [mailto:junkoi2004 at gmail.com<mailto:junkoi2004 at gmail.com>]
> Sent: 18 February, 2016 13:38
>
> To: Tamazov, Artem
> Subject: Re: [llvm-dev] Bug in X86 assembler?
>
>
>
>
>
>
>
> On Thu, Feb 18, 2016 at 6:25 PM, Tamazov, Artem <Artem.Tamazov at amd.com<mailto:Artem.Tamazov at amd.com>> wrote:
>
> Look in ...\llvm\test\MC\X86\x86-64.s
>
> IMHO what you need is there.
>
>
>
> what do you mean? what can i find from there?
>
>
> thanks.
>
>
>>
>>
>>
>> From: Jun Koi [mailto:junkoi2004 at gmail.com<mailto:junkoi2004 at gmail.com>]
>> Sent: 18 February, 2016 13:11
>>
>>
>> To: Tamazov, Artem
>> Subject: Re: [llvm-dev] Bug in X86 assembler?
>>
>>
>>
>>
>>
>>
>>
>> On Thu, Feb 18, 2016 at 5:59 PM, Tamazov, Artem <Artem.Tamazov at amd.com<mailto:Artem.Tamazov at amd.com>> wrote:
>>
>> Hmm... I would check if 64-bit immediate operands are allowed in the x86 ISA.
>>
>>
>>
>> "MOV r64, imm64" is allowed in 3-528 Vol 2A of Intel manual, so yes it is legal
>>
>>
>>
>>>
>>> Also I would play with -mcpu option.
>>
>>
>>
>> What do you mean? like "-mcpu=x86_64" ?
>>
>> Thanks,
>>
>>
>>
>>>
>>> --artem
>>>
>>> ________________________________
>>>
>>> From: Jun Koi [junkoi2004 at gmail.com<mailto:junkoi2004 at gmail.com>]
>>> Sent: Thursday, February 18, 2016 05:18
>>> To: Tamazov, Artem
>>> Subject: Re: [llvm-dev] Bug in X86 assembler?
>>>
>>>
>>>
>>>
>>>
>>> On Thu, Feb 18, 2016 at 10:09 AM, Jun Koi <junkoi2004 at gmail.com<mailto:junkoi2004 at gmail.com>> wrote:
>>>
>>>
>>>
>>>
>>>
>>> On Thu, Feb 18, 2016 at 2:20 AM, Tamazov, Artem <Artem.Tamazov at amd.com<mailto:Artem.Tamazov at amd.com>> wrote:
>>>
>>> It seems that 0x1234567800 cannot be fit into 32 bits.
>>>
>>>
>>>
>>> But R8 is a 64bit register, isn't it??
>>>
>>>
>>> This 64bit register R8 is reflected here:
>>> https://github.com/llvm-mirror/llvm/blob/master/lib/Target/X86/X86RegisterInfo.td#L349
>>>
>>> Thanks.
>>>>
>>>>
>>>>
>>>> Thanks.
>>>>
>>>>
>>>>
>>>>>
>>>>> --artem//
>>>>>
>>>>>
>>>>>
>>>>> From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org<mailto:llvm-dev-bounces at lists.llvm.org>] On Behalf Of Jun Koi via llvm-dev
>>>>> Sent: 17 February, 2016 19:11
>>>>> To: llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>
>>>>> Subject: [llvm-dev] Bug in X86 assembler?
>>>>>
>>>>>
>>>>>
>>>>> Hi,
>>>>>
>>>>> I find that the X86 assembler can compile code like "mov r8, 0x12345678" without any issues.
>>>>>
>>>>> $ echo "mov r8, 0x12345678"|./bin/llvm-mc -assemble -show-encoding -x86-asm-syntax=intel -print-imm-hex -triple=x86_64
>>>>>     .text
>>>>>     movq    $0x12345678, %r8        # encoding: [0x49,0xc7,0xc0,0x78,0x56,0x34,0x12]
>>>>>
>>>>> However, it fails to compile "mov r8, 0x1234567800":
>>>>>
>>>>> $ echo "mov r8, 0x1234567800"|./bin/llvm-mc -assemble -show-encoding -x86-asm-syntax=intel -print-imm-hex -triple=x86_64
>>>>>     .text
>>>>> <stdin>:1:1: error: invalid operand for instruction
>>>>> mov r8, 0x1234567800
>>>>> ^
>>>>>
>>>>>
>>>>>
>>>>> Is this a bug?
>>>>>
>>>>> Thank you,
>>>>>
>>>>> Jun
>>>>
>>>>
>>>
>>>
>>
>>
>
>
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