<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:x="urn:schemas-microsoft-com:office:excel" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<meta name="Generator" content="Microsoft Word 14 (filtered medium)">
<style><!--
/* Font Definitions */
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
@font-face
{font-family:Tahoma;
panose-1:2 11 6 4 3 5 4 4 2 4;}
/* Style Definitions */
p.MsoNormal, li.MsoNormal, div.MsoNormal
{margin:0cm;
margin-bottom:.0001pt;
font-size:12.0pt;
font-family:"Times New Roman","serif";}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:blue;
text-decoration:underline;}
a:visited, span.MsoHyperlinkFollowed
{mso-style-priority:99;
color:purple;
text-decoration:underline;}
p
{mso-style-priority:99;
mso-margin-top-alt:auto;
margin-right:0cm;
mso-margin-bottom-alt:auto;
margin-left:0cm;
font-size:12.0pt;
font-family:"Times New Roman","serif";}
span.EmailStyle18
{mso-style-type:personal-reply;
font-family:"Calibri","sans-serif";
color:purple;}
.MsoChpDefault
{mso-style-type:export-only;
font-family:"Calibri","sans-serif";}
@page WordSection1
{size:612.0pt 792.0pt;
margin:72.0pt 72.0pt 72.0pt 72.0pt;}
div.WordSection1
{page:WordSection1;}
--></style><!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext="edit">
<o:idmap v:ext="edit" data="1" />
</o:shapelayout></xml><![endif]-->
</head>
<body lang="EN-US" link="blue" vlink="purple">
<div class="WordSection1">
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">You can't use mov.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">I am not an x86 expert, but after quick googling:<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:36.0pt"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#0000CC">Recall that immediates are normally restricted to 32 bits. To load a larger constant into a quad register, use<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:36.0pt"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#0000CC">movabsq, which takes a full 64-bit immediate as its source<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:36.0pt"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">[https://www.lri.fr/~filliatr/ens/compil/x86-64.pdf]<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Even in your example, assembler replaces mov by movq, which, say,
<i>hints</i>:<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-left:36.0pt">>>>>> $ echo "mov r8, 0x12345678"|./bin/llvm-mc -assemble -show-encoding -x86-asm-syntax=intel -print-imm-hex -triple=x86_64
<br>
>>>>> .text<br>
>>>>> movq $0x12345678, %r8 # encoding: [0x49,0xc7,0xc0,0x78,0x56,0x34,0x12]<o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">I would recommend you some studying of x86 instruction set.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Another recommendation is to look at existing tests when you suspect a bug.
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">--artem.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:purple"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Jun Koi [mailto:junkoi2004@gmail.com]
<br>
<b>Sent:</b> 18 February, 2016 15:09<br>
<b>To:</b> Tamazov, Artem<br>
<b>Subject:</b> RE: [llvm-dev] Bug in X86 assembler?<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p><br>
On Feb 18, 2016 7:27 PM, "Tamazov, Artem" <<a href="mailto:Artem.Tamazov@amd.com">Artem.Tamazov@amd.com</a>> wrote:<br>
><br>
> movabsq %rax,0xabcdef1234567890<o:p></o:p></p>
<p>Cool, but i want to use mov to copy immediate to 64 reg, and for some reasons Llvm cannot do that. I want to confirm this is a bug, but not to find workaround.<o:p></o:p></p>
<p style="margin-bottom:12.0pt">Thanks.<o:p></o:p></p>
<p>><br>
> See <a href="https://www.cs.cmu.edu/~fp/courses/15213-s07/misc/asm64-handout.pdf">
https://www.cs.cmu.edu/~fp/courses/15213-s07/misc/asm64-handout.pdf</a><br>
><br>
> --artem//<br>
><br>
> <br>
><br>
> From: Jun Koi [mailto:<a href="mailto:junkoi2004@gmail.com">junkoi2004@gmail.com</a>]
<br>
> Sent: 18 February, 2016 13:38<br>
><br>
> To: Tamazov, Artem<br>
> Subject: Re: [llvm-dev] Bug in X86 assembler?<br>
><br>
> <br>
><br>
> <br>
><br>
> <br>
><br>
> On Thu, Feb 18, 2016 at 6:25 PM, Tamazov, Artem <<a href="mailto:Artem.Tamazov@amd.com">Artem.Tamazov@amd.com</a>> wrote:<br>
><br>
> Look in ...\llvm\test\MC\X86\x86-64.s<br>
><br>
> IMHO what you need is there.<br>
><br>
> <br>
><br>
> what do you mean? what can i find from there?<br>
><br>
><br>
> thanks.<br>
><br>
> <br>
>><br>
>> <br>
>><br>
>> From: Jun Koi [mailto:<a href="mailto:junkoi2004@gmail.com">junkoi2004@gmail.com</a>]
<br>
>> Sent: 18 February, 2016 13:11<br>
>><br>
>><br>
>> To: Tamazov, Artem<br>
>> Subject: Re: [llvm-dev] Bug in X86 assembler?<br>
>><br>
>> <br>
>><br>
>> <br>
>><br>
>> <br>
>><br>
>> On Thu, Feb 18, 2016 at 5:59 PM, Tamazov, Artem <<a href="mailto:Artem.Tamazov@amd.com">Artem.Tamazov@amd.com</a>> wrote:<br>
>><br>
>> Hmm... I would check if 64-bit immediate operands are allowed in the x86 ISA.<br>
>><br>
>> <br>
>><br>
>> "MOV r64, imm64" is allowed in 3-528 Vol 2A of Intel manual, so yes it is legal<br>
>><br>
>><br>
>> <br>
>>><br>
>>> Also I would play with -mcpu option.<br>
>><br>
>> <br>
>><br>
>> What do you mean? like "-mcpu=x86_64" ?<br>
>><br>
>> Thanks,<br>
>><br>
>><br>
>> <br>
>>><br>
>>> --artem<br>
>>><br>
>>> ________________________________<br>
>>><br>
>>> From: Jun Koi [<a href="mailto:junkoi2004@gmail.com">junkoi2004@gmail.com</a>]<br>
>>> Sent: Thursday, February 18, 2016 05:18<br>
>>> To: Tamazov, Artem<br>
>>> Subject: Re: [llvm-dev] Bug in X86 assembler?<br>
>>><br>
>>> <br>
>>><br>
>>> <br>
>>><br>
>>> On Thu, Feb 18, 2016 at 10:09 AM, Jun Koi <<a href="mailto:junkoi2004@gmail.com">junkoi2004@gmail.com</a>> wrote:<br>
>>><br>
>>> <br>
>>><br>
>>> <br>
>>><br>
>>> On Thu, Feb 18, 2016 at 2:20 AM, Tamazov, Artem <<a href="mailto:Artem.Tamazov@amd.com">Artem.Tamazov@amd.com</a>> wrote:<br>
>>><br>
>>> It seems that 0x1234567800 cannot be fit into 32 bits.<br>
>>><br>
>>> <br>
>>><br>
>>> But R8 is a 64bit register, isn't it??<br>
>>><br>
>>><br>
>>> This 64bit register R8 is reflected here:<br>
>>> <a href="https://github.com/llvm-mirror/llvm/blob/master/lib/Target/X86/X86RegisterInfo.td#L349">
https://github.com/llvm-mirror/llvm/blob/master/lib/Target/X86/X86RegisterInfo.td#L349</a><br>
>>><br>
>>> Thanks.<br>
>>>><br>
>>>> <br>
>>>><br>
>>>> Thanks.<br>
>>>><br>
>>>><br>
>>>> <br>
>>>>><br>
>>>>> --artem//<br>
>>>>><br>
>>>>> <br>
>>>>><br>
>>>>> From: llvm-dev [mailto:<a href="mailto:llvm-dev-bounces@lists.llvm.org">llvm-dev-bounces@lists.llvm.org</a>] On Behalf Of Jun Koi via llvm-dev<br>
>>>>> Sent: 17 February, 2016 19:11<br>
>>>>> To: <a href="mailto:llvm-dev@lists.llvm.org">llvm-dev@lists.llvm.org</a><br>
>>>>> Subject: [llvm-dev] Bug in X86 assembler?<br>
>>>>><br>
>>>>> <br>
>>>>><br>
>>>>> Hi,<br>
>>>>><br>
>>>>> I find that the X86 assembler can compile code like "mov r8, 0x12345678" without any issues.<br>
>>>>><br>
>>>>> $ echo "mov r8, 0x12345678"|./bin/llvm-mc -assemble -show-encoding -x86-asm-syntax=intel -print-imm-hex -triple=x86_64
<br>
>>>>> .text<br>
>>>>> movq $0x12345678, %r8 # encoding: [0x49,0xc7,0xc0,0x78,0x56,0x34,0x12]<br>
>>>>><br>
>>>>> However, it fails to compile "mov r8, 0x1234567800":<br>
>>>>><br>
>>>>> $ echo "mov r8, 0x1234567800"|./bin/llvm-mc -assemble -show-encoding -x86-asm-syntax=intel -print-imm-hex -triple=x86_64<br>
>>>>> .text<br>
>>>>> <stdin>:1:1: error: invalid operand for instruction<br>
>>>>> mov r8, 0x1234567800<br>
>>>>> ^<br>
>>>>><br>
>>>>> <br>
>>>>><br>
>>>>> Is this a bug?<br>
>>>>><br>
>>>>> Thank you,<br>
>>>>><br>
>>>>> Jun<br>
>>>><br>
>>>> <br>
>>><br>
>>> <br>
>><br>
>> <br>
><br>
> <o:p></o:p></p>
</div>
</body>
</html>