[llvm-dev] a bundle with one instruction

[Krzysztof Parzyszek via llvm-dev]

On 2/16/2016 12:36 PM, Rail Shafigulin wrote:
>     No problem.  At some point the machine instructions represented by a
>     class "MachineInstr" are transformed into a representation using
>     class "MCInst".  This is the MC level I'm talking about.  It's the
>     representation that the llvm-mc uses.
>
>
> Do you mind pointing out where in the code this is happening?

For Hexagon, it happens in lib/Target/Hexagon/HexagonMCInstLower.cpp. 
In function "HexagonLowerToMC" to be exact.

For other targets, look in lib/Target/<target>/*MCInstLower.cpp

-Krzysztof


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