[llvm-dev] Assign different RegClasses to a virtual register based on 'uniform' attribute?
Ruiling Song via llvm-dev
llvm-dev at lists.llvm.org
Mon Dec 19 19:00:09 PST 2016
Hi,
I am working on a new LLVM target for Intel GPU, which also has same kind
of scalar/vector register classes used in AMDGPU target. Like for a i32
virtual register, it will be held in scalar register if its value is
uniform across a wavefront/warp, otherwise it will be in a vector register.
Does AMDGPU already done this? I read the code, but I didn't figure out how
to do this. Anybody has idea on this?
- Ruiling
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