[llvm-dev] Instructions with no operand

[Krzysztof Parzyszek via llvm-dev]

On 11/6/2015 11:35 AM, Sky Flyer via llvm-dev wrote:
> Guys, I stuck at this point. Could you please give me a hint how to
> solve this problem without touching the LLVM backbone?!
> Why LLVM doesn't let me define an instruction consisting of an operator
> with no operand?


Could you try it without the pattern?  I.e. just this:

      class TestInst<string opc, string asmstr, dag oops, dag iops,
                     list<dag> pattern> : Instruction { ... }

      class ALU<string opc> : TestInst<opc, "", (outs), (ins)>;

See if you get the same error.  I suspect it has to do with the 
intrinsic itself, not the instruction definition.

-Krzysztof


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