[LLVMdev] TSFlags

Sky Flyer skylake007 at googlemail.com
Fri Jul 10 08:23:28 PDT 2015


Many thanks for your prompt reply.

I mean, imagine you have 3 bits for condition flags in your instruction
(e.g.  overflow, zero, carry set, ...) for conditional executions AND there
is no direct access to the Status Register, is it even possible to
implement such scenario?


On Fri, Jul 10, 2015 at 4:54 PM, Krzysztof Parzyszek <
kparzysz at codeaurora.org> wrote:

> On 7/10/2015 9:32 AM, Sky Flyer wrote:
>
>>
>> I wan to ask, what is exactly the purpose of TSFlags and can it be used
>> for the condition handling in instructions?
>> How can I implement the conditions in the instruction when I don't have
>> access to the Status Register?
>>
>
> These are target-specific flags that are then stored in the instruction
> descriptor.  You can use them to encode various properties of the
> instruction that are of interest to your target.
>
> I'm not sure what you mean about condition handling, but TSFlags are
> "static" in the sense that for a given opcode they remain fixed throughout
> compilation.  For conditional instructions you can have a flag there that
> says that the instruction is conditional, but any variable characteristics
> must be encoded in other ways.
>
> -Krzysztof
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150710/3373bb63/attachment.html>


More information about the llvm-dev mailing list