[LLVMdev] Declare multiple data type for a register class in tblegen

[Matt Arsenault]

On 07/02/2015 05:56 PM, Xiaochu Liu wrote:
> Hi everyone,
>
> I tried to declare multiple data type [i64, i32, v2i32] for a 64 bit 
> register class GPR. It works OK but I have one problem that is hard to 
> find.
>
> When I tried to map a load instruction of a v2i32 type (LOAD 
> v2i32:$dst) to load GPR, it always generate two LOAD i32 instead of 
> one LOAD v2i32. Any folds understand how this works?
>
> Xiaochu
>
You probably haven't called addRegisterClass in the TargetLowering 
constructor for the vector type. Without it added there, the type 
legalizer will split the vector load into components

-Matt