[LLVMdev] Different instruction encodings based on subtarget features

[Dylan McKay]

I am working on an LLVM backend for the AVR architecture, and am having
troubles working with the codegen layer, trying to get around the quirks of
the binary encodings of the AVR ISR.

There are several different families of AVR microcontrollers, each with a
minimum 'core' instruction set. Each family builds upon (or removes) the
core ISR with more instructions or different encodings.

My context is that the binary encodings of certain instructions differ
solely with the 'AVR Tiny' family of devices (see the bottom row of the
tabled headed "Instruction set inheritance" linked here
<http://en.wikipedia.org/wiki/Atmel_AVR_instruction_set>). I have a
subtarget feature specifically for each CPU family.

What I would like to do is choose a different instruction encoding based on
whether or not the 'AVR Tiny' subtarget feature is enabled. I have found
this <http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-November/055149.html>
link to a LLVMdev email which is quite dated, and if I may say so myself --
is a dirty hack.

Is there a way to do this without hacking the build system?
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