[llvm-dev] [RFC] design doc for straight-line scalar optimizations

[escha via llvm-dev]

> On Aug 24, 2015, at 11:10 AM, Jingyue Wu via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi, 
> 
> As you may have noticed, since last year, we (Google's CUDA compiler team) have contributed quite a lot to the effort of optimizing LLVM for CUDA programs. I think it's worthwhile to write some docs to wrap them up for two reasons. 
> 1) Whoever wants to understand or work on these optimizations has some detailed docs instead of just source code to refer to. 
> 2) RFC on how to improve these optimizations so that other targets can benefit from them as well. They are currently mostly restricted to the NVPTX backend, but I see many potentials to generalize them. 
> 
> So, I started from this overdue design doc <https://urldefense.proofpoint.com/v2/url?u=https-3A__docs.google.com_document_d_1momWzKFf4D6h8H3YlfgKQ3qeZy5ayvMRh6yR-2DXn2hUE_edit-3Fusp-3Dsharing&d=BQMFaQ&c=eEvniauFctOgLOKGJOplqw&r=szS1_DDBoKCtS8B5df7mJg&m=TggebUNOWYFU5W3tKpC_z1CkNT9MN05aBwWloSru2NI&s=vmPxp-RDJuf_ZN5X7LNlV10JwuHK5Pt1ljn96IenW-o&e=> on the straight-line scalar optimizations. I will send out more docs on other optimizations later. Please feel free to comment. 
> 
> Thanks, 
> Jingyue

Out of curiosity, is there any plan to make the NVPTX-originated passes (separateconstantoffsetfromgep, slsr, naryreassociate) more generic? They seem very specialized for the nVidia GPU addressing modes despite the generic names, and in my tests tend to pessimize our target more often than not for that reason.

It’d be really nice to have something more generic, and I might look into helping with that sort of thing in the future if it becomes important for us.

—escha
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