[LLVMdev] RFC: Machine Level IR text-based serialization format

[Krzysztof Parzyszek]

On 4/28/2015 12:46 PM, Alex L wrote:
>
> I hope that answers your question,

Partly. :)
I'm wondering what support you would need from each target.  Obviously 
you'd need to be able to parse the mnemonics and the register names, but 
that's probably doable without additional target-specific support.

Also, is this going to support SSA and post-SSA/post-RA code?

-Krzysztof

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