[LLVMdev] MIPS - Filling delay slots

[Daniel Sanders]

> beqz  s4,1f

> li    at,8704 ; **DELAY SLOT**

> j     2f

> udi   VPU,vpu_find_first_neg_from_reduction_4_mcs05,1,zero ; **DELAY SLOT**

> 1:

> udi   VPU,vpu_find_first_neg_from_reduction_4,1,zero

> 2:

> udi   VPU,wait_req_pending,1,s1,0,0

>
> Is there something I could try to exploit delay slots in branch instructions or are there any recent patch which deals with this?
It looks like you're pulling instructions from the successor blocks into the delay slot. This is valid (with some exceptions like branches) and there is code in our backend to do it. However, it's not enabled by default at the moment because it has some problems.
The feature is guarded by -disable-mips-df-forward-search and -disable-mips-df-succbb-search (which both default to true) if you want to try it.

Also relevant: If you're on the trunk then you'll already have this Vasileios noticed an issue recently with KILL instructions preventing opportunities to fill the delay slot. This was fixed in r235183 (http://reviews.llvm.org/rL235183).

From: Ambuj Agrawal [mailto:ambujbwt at gmail.com]
Sent: 24 April 2015 17:14
To: Daniel Sanders; llvmdev at cs.uiuc.edu
Subject: MIPS - Filling delay slots


Hi Daniel,

The Clang with LLVM backend seems to be missing some opportunities to fill branch delay slots for the MIPS M14K processor.

Example:
static inline void LOCAL(encode_position)(VARS)

{

  if (vars->is_mcs05) {

    udi(vpu_find_first_neg_from_reduction_4_mcs05, 1, 0);

  } else {

    udi(vpu_find_first_neg_from_reduction_4, 1, 0);

  }

}



is giving



bfc03394:     12800004       beqz    s4,bfc033a8 <rx4_eostf+0x4a4>

bfc03398:     00000000       nop

bfc0339c:     70016450       udi     VPU,vpu_find_first_neg_from_reduction_4_mcs05,1,zero

bfc033a0:     0bf00ceb       j       bfc033ac <rx4_eostf+0x4a8>

bfc033a4:     00000000       nop

bfc033a8:     70016350       udi     VPU,vpu_find_first_neg_from_reduction_4,1,zero

bfc033ac:     24012200       li      at,8704

bfc033b0:     72201bd0       udi     VPU,wait_req_pending,1,s1,0,0



I think the following is possible



beqz   s4,1f

li     at,8704 ; **DELAY SLOT**

j      2f

udi    VPU,vpu_find_first_neg_from_reduction_4_mcs05,1,zero ; **DELAY SLOT**

1:

udi    VPU,vpu_find_first_neg_from_reduction_4,1,zero

2:

udi    VPU,wait_req_pending,1,s1,0,0

Is there something I could try to exploit delay slots in branch instructions or are there any recent patch which deals with this?

Thanks,

Ambuj


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