[LLVMdev] bx instruction getting generated in arm assembly for O1

Mayur Pandey mayurthebond at gmail.com
Fri Nov 28 10:53:07 PST 2014


Hi Nick,

Thanks for providing this info. I was looking for the patch which caused
this behaviour in 3.5 not occuring in 3.4.2. Thanks for directing me to the
patches.

Regards,
Mayur

On Wed, Nov 26, 2014 at 2:11 AM, Nick Lewycky <nicholas at mxc.ca> wrote:

> Mayur Pandey wrote:
>
>> Hi Tim,
>>
>> Thanks for the response. Even I thought this might be the result of tail
>> call optimisation in O1, but with clang-3.4.2 this behaviour is not seen
>> in O1, so wanted to know which change triggered this behaviour in O1 in
>> clang-3.5.
>>
>
> Between clang 3.4 and clang 3.5, I rewrote tail call deduction in the
> optimizer:
>
> http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-
> of-Mon-20140505/215891.html
> and also made a matching change to clang NRVO which causes us to LLVM IR
> that use the above optimization more often:
>
> http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-
> Mon-20140428/104594.html
>
> That might be it.
>
> Nick
>
>  On Mon, Nov 24, 2014 at 10:55 PM, Tim Northover <tnorthover at apple.com
>> <mailto:tnorthover at apple.com>> wrote:
>>
>>     Hi Mayur,
>>
>>      > On 24 Nov 2014, at 07:00, MAYUR PANDEY <mayur.p at samsung.com
>>     <mailto:mayur.p at samsung.com>> wrote:
>>      > In the assembly generated with O0, we are getting the "blx"
>>     instruction whereas with O1 we get "bx" (in 3.4.2 we used to get
>>     "blx" for both O0 and O1).
>>      >
>>      > Is this because of this patch:  [llvm] r214959 - ARM: do not
>>     generate BLX instructions on Cortex-M CPUs
>>
>>     Isn't this just the usual tail call optimisations kicking in at O1?
>>     Or is there some problem with this behaviour that I'm missing (both
>>     variants seem to be supported on v5t).
>>
>>     Cheers.
>>
>>     Tim.
>>
>>     _______________________________________________
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>> http://llvm.cs.uiuc.edu
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>>
>>
>>
>>
>> --
>> Thanx & Regards
>> *Mayur Pandey *
>> Lead Engineer
>> Samsung R&D Institute India
>> Bangalore
>> +91-9742959541
>>
>>
>>
>> _______________________________________________
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>> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
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>>
>
>


-- 
Thanx & Regards
*Mayur Pandey *
Lead Engineer
Samsung R&D Institute India
Bangalore
+91-9742959541
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