[LLVMdev] bx instruction getting generated in arm assembly for O1

[Tim Northover]

Hi Mayur,

> On 24 Nov 2014, at 07:00, MAYUR PANDEY <mayur.p at samsung.com> wrote:
> In the assembly generated with O0, we are getting the "blx" instruction whereas with O1 we get "bx" (in 3.4.2 we used to get "blx" for both O0 and O1). 
>  
> Is this because of this patch:  [llvm] r214959 - ARM: do not generate BLX instructions on Cortex-M CPUs

Isn't this just the usual tail call optimisations kicking in at O1? Or is there some problem with this behaviour that I'm missing (both variants seem to be supported on v5t).

Cheers.

Tim.