[LLVMdev] Virtual register def doesn't dominate all uses

[Tim Northover]

Hi Boris,

On 5 November 2014 07:14, Boris Boesler <baembel at gmx.de> wrote:
>  Hm, these are no patterns like "def : Pat<..>;". These are patterns inside instructions,

Yep, just give empty square brackets as the pattern for MV
instructions. Sorry, I should have mentioned the inside-instruction
version in my initial message. It does basically the same thing as the
one I suggested. It just didn't occur to me that you could write it
there (I'd made my own mistakes with a separate Pat).

> and I do have to specify them to use them in copyPhysReg(), don't I?

copyPhysReg will be called automatically when LLVM wants to do a MV.
The default implementation will just assert, but you'll definitely
need to implement a sensible version making use of your own MVs sooner
or later.

Cheers.

Tim.