[LLVMdev] Passing specific register for an Instruction in target description files.

[Quentin Colombet]

Hi Arsen,


> On Jun 19, 2014, at 10:43 PM, Arsen Hakobyan <artinetstudio at gmail.com> wrote:
> 
> Hi all,
> 
> I want to generate an assembly instruction for my target using target
> description representation of the instruction. The problem is that I want to
> add direct register to be chose as an output register for my target. Does it
> possible to do with an instruction definition in TARGETInstrInfo.td  file? 
> May be someone could help with an example?

If I understood correctly, you want your instruction to define a specific register.
If yes, you can achieve this by creating a specialized singleton register class with the register you want and use it in the td file.
E.g., in yourTargetRegisterInfo.td:
def MyReg : RegisterClass<“MyTarget”, [Related Types], MySize, (add MyReg)>;

in yourTargetInstrInfo.td:
def MyInstr […] (outs MyReg:$Rd) […]

The ARM target does something similar for SP. Look for GPRsp.

Cheers,
-Quentin

> 
> Currently I have seen that we can pass the name of the registers' group, and
> direct registers as an implicit operands (with Uses or Defs) but I want to
> pass specific register.
> 
> Thank you very much for your time,
> Arsen
> 
> 
> 
> 
> 
> --
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