[LLVMdev] Regarding Instruction definition in LLVM backend

[Tim Northover]

> I need that immediate value latter to concatenate to registers' names (which
> I am doing during assembly printing).

That really sounds like an odd implementation. Are your other
instructions more normal (i.e. proper instance of RegisterClass,
non-trivial (outs ...) and (ins ...), printing operands mostly handled
by LLVM, ...)?

If not, you really should be trying to follow that convention. This
approach just isn't going to work in LLVM. On the other hand, if they
are, what makes this MOV special? It looks like it's only that you
have a really odd intrinsic you're trying to define?

Or is it that MYREG1_NAME and MYREG2_NAME aren't your usual general
purpose registers, and actually more like system control placeholders?
AArch64, for example, has "mrs x0, TPIDR_EL0" to read the
thread-specific base address; x0 is normal, but TPIDR_EL0 isn't a
register LLVM should be tracking; it's more of an immediate with a
convenient textual form.

Either way, I think there are other ways to handle an intrinsic like
that, but we need to know more details to say what they are.

Cheers.

Tim.