[LLVMdev] AArch64 codegen question

[Sanjay Patel]

Hi AArch64 experts -

I'm working on a DAGCombiner patch, and it causes a change in an existing
regression test.

We're generating this:
   ext    v0.16b, v1.16b, v1.16b, #8

Rather than this:
   mov    d0, v1.d[1]

Are those logically equivalent? Is one form preferred over the other?

This is the IR test case in /test/CodeGen/AArch64/neon-scalar-copy.ll:

define <1 x i64> @test_vector_copy_dup_dv2D(<1 x i64> %a, <2 x i64> %c) {
  ; CHECK-LABEL: test_vector_copy_dup_dv2D
  ; CHECK: {{dup|mov}} {{d[0-9]+}}, {{v[0-9]+}}.d[1]
  %vget_lane = extractelement <2 x i64> %c, i32 1
  %vset_lane = insertelement <1 x i64> undef, i64 %vget_lane, i32 0
  ret <1 x i64> %vset_lane
}
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