[LLVMdev] Is it possible to tie two defs together?

[Tom Stellard]

On Fri, Aug 15, 2014 at 02:38:36PM -0400, Ryan Taylor wrote:
> For example, if you have something like:
> 
> ....
> vreg3 = LD operation
> vreg4 = vreg2 * vreg1
> ...
> 
> Where I would like vreg3 and vreg4 to map to the same physical register?
> 
> Imagine that the second instruction has an implicit arithmetic operation
> tied to vreg 4 such that vreg4 is both an input and output and the initial
> value of vreg4 is loaded into vreg3, so such that vreg4 = vreg3.
> 

I don't quite understand your explanation for how the instructions are
connected, but one way to solved this would be to represent both
instructions with a single pseudo instruction and then expand
it post-RA.

-Tom

> Is this possible pre-regalloc?
> 
> Thanks.

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